One of the steps for processing a semiconductor device is ion implantation of impurity elements in a semiconductor wafer substrate such as silicon, silicon carbide (SiC), gallium arsenide (GaAs), gallium nitride (GaN) and the like to be a substrate. FIG. 2 is a schematic view of one embodiment of an ion implantation apparatus to be used in said step. An ion implantation apparatus 10 is an apparatus for ionizing a desired impurity element, accelerating the element to a given energy, and impacting same against a semiconductor substrate (wafer substrate 16) and the like. The ion implantation apparatus 10 shown in the Figure is provided with an ion source 11 that generates ions by affording a gas in a plasma state and containing a desired impurity element, an extractor electrode 12 for extracting generated ions, a separating electromagnet 13 for selecting desired ions from the extracted ions, an accelerating electrode 14 for accelerating ions, and a deflecting electrode 15 for deflecting the accelerated ions, where the deflected ions of the impurity element are impacted against (implanted in) a wafer substrate 16 set in front of a beam stop 17 through a shutter 18 and a cassette 19. The dotted line in the Figure shows the progress of the ions to be implanted.
The material constituting each part of the ion implantation apparatus is required to be a high purity material showing superior heat resistance and superior thermal conductivity, less ablation (erosion) due to the ion beam, and a low impurity content. For example, graphite materials used as materials for flight tubes, various kinds of slits, electrodes, electrode covers, guide tubes, beam stop and the like are employed. Particularly, high density and high intensity graphite members have been conventionally used for a high energy ion implantation apparatus wherein the energy of impurity element ion implantation is not less than 1 MeV. Patent references relating to these prior arts are, for example, JP-A-8-45467, JP-A-9-199073, JP-A-10-12180, JP-A-2000-323052, JP-A-2004-158226, US-B-2003/38252 and US-B-2003/79834.
In addition to the aforementioned techniques, a graphite member coated or impregnated with glassy carbon or pyrolytic carbon may be used as a beam line inner member of an ion implantation apparatus. Patent references relating to this prior art are, for example, JP-A-9-63522, JP-A-8-171883, JP-A-7-302568, JP-A-2000-128640 and JP-A-11-283553.
The graphite material is made by sintering coke to be an aggregate and a binder. Therefore, use of a graphite material for an ion implantation apparatus is feared to give rise to problems of contamination of the inside of an ion implantation apparatus by graphite particles fallen off due to the ion beam, and decreased yield of a semiconductor device due to incorporation of the particles in a wafer substrate. Moreover, a problem of ablation of graphite member due to ion beam irradiation is also feared.
In recent years, the gate length of an MOS device is becoming not more than 90 nm along with downsizing of the design rule of integrated circuit devices and super high densification and ultra high speed achieved by integrated circuit devices. As an ion implantation technique to realize the above, ultra-shallow distribution of implanted impurity is required. The ultra-shallow distribution enables ultra-shallow junction of source/drain. Thus, plasma doping as a low-energy ion implantation method and low-energy ion implantation by decelerating electric fields have been studied and developed. Under such situation, ion irradiation energy on graphite in a beam line, i.e., acceleration voltage, sometimes becomes lower than the conventional level, for example, about 2 keV or below. With high energy, ion implantation is possible, but with low energy, sputtering may occur.